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NXP Semiconductors Buffer I2C-Bus differenziale multipunto a 2 canali PCA961xDP NXP

I buffer I²C-Bus differenziali multipunto a 2 canali PCA961xDP di NXP sono buffer SMBus/I²C-bus Fast-mode Plus (Fm+) che ampliano la capacità dei normali SMBus/I²C-bus a terminazione singola in ambienti elettricamente rumorosi utilizzando un livello fisico SMBus/I²C-bus (dI²C), trasparente al livello di protocollo SMBus/I²C-bus. Questi dispositivi sono composti da due canali driver a terminazione singola a differenziale per SCL (clock seriale), SDA (dati seriali). Grazie all'uso di linee di trasmissione differenziali tra buffer bus dI²C identici, il PCA961xDP rimuove i rumori elettrici e gli offset di modo comune presenti quando le linee del segnale devono passare tra domini di tensione diversa, sono presenti segnali ostili oppure sono adiacenti a sorgenti di disturbi elettrici, come alimentatori e motori elettrici ad alta energia. I buffer I²C-Bus differenziali multipunto a 2 canali PCA961xDP sono ideali per ambienti ad alto rumore e/o applicazioni con cavi molto lunghi, consentono l'uso di più slave e funzionano a una velocità bus fino a una frequenza di clock di 1 MHz.

Caratteristiche

  • New dI²C-bus buffers offer improved resistance to system noise and ground offset up to 1⁄2 of supply voltage
  • 2 channel dI²C (differential I2C-bus) to Fm+ single-ended buffer operating up to 1MHz with 30mA SDA/SCL drive capability
  • Compatible with I2C-bus Standard/Fast-mode and SMBus, Fast-mode Plus up to 1MHz
  • Single-ended I2C-bus on card side up to 540pF
  • Differential I2C-bus on cable side supporting multi-drop bus
    • Maximum cable length: 3m (approximately 10 feet) (longer at lower frequency)
    • dI²C output: 1.5V differential output with nominal terminals
    • Differential line impedance (user-defined): 100Ω nominal suggested
    • Receive input sensitivity: ±200mV
    • Hysteresis: ±30mV typical
    • Input impedance: high-impedance (1 MΩ typical)
    • Receive input voltage range: -0.5V to +5.5V
  • Supports arbitration and clock stretching across the dI²C-bus buffers
  • Lock-up free operation
  • Powered-off and powering-up high-impedance I2C-bus pins
  • Operating supply voltage (VDD(A)) range of 2.3V to 5.5V with single-ended side 5.5V tolerant
  • Differential I2C-bus operating supply voltage (VDD(B)) range of 3.0V to 5.5V, with 5.5V tolerant (the best operation is at 5V)
  • ESD protection exceeds 2000V HBM per JESD22-A114 and 1000V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100mA

  • PCA9615 Features
    • Hot-swap (allows insertion or removal of modules or card without disruption to bus data)
    • EN signal (PCA9615 input) controls PCA9615 hot-swap sequence
    • Bus idle detect (PCA9615 internal function) waits for a bus idle condition before the connection is made

Applicazioni

  • Monitor remote temperature/leak detectors in harsh environment
  • Control of power supplies in high noise environment
  • Transmission of I2C-bus between equipment cabinets
  • Commercial lighting and industrial heating/cooling control
  • Any application that requires long I2C-bus runs in electrically noisy environments
  • Any application with multiple power suppliers and the potential for ground offsets up to 2.5V
Pubblicato: 2015-01-15 | Aggiornato: 2022-11-03