Infineon Technologies HYPERFLASH™ NOR Flash Memory
Infineon Technologies HYPERFLASH NOR Flash Memory is based on the Infineon HYPERBUS™ Interface, which allows for read throughput of up to 333MB/s. HYPERFLASH uses a small 8x6mm ball grid array (BGA) package sharing a common footprint with Quad SPI and Dual-Quad SPI parts to simplify board layout. The Infineon HYPERFLASH NOR Flash Memory is ideal for high-performance applications, such as automotive instrument clusters, communication systems, industrial automation, and medical equipment, which require very high read bandwidth to enable a fast boot time for instant-on requirements, along with a low pin-count interface to reduce package size and PCB cost.
Features
- 3.0V I/O, 11 bus signals
- Single-ended clock
- 8V I/O, 12 bus signals
- Differential clock (CK, CK#)
- Chip Select (CS#)
- 8-bit data bus (DQ[7:0])
- Read-Write Data Strobe (RWDS)
- HYPERFLASH memories use RWDS only as a Read Data Strobe
- Up to 333MBps sustained read throughput
- Double-Data Rate (DDR) – two data transfers per clock
- 166MHz clock rate (333MBps) at 1.8V VCC
- 100MHz clock rate (200MBps) at 3.0V VCC
- 96ns initial random read access time
- Initial random access read latency: five to 16 clock cycles
- Sequential burst transactions
- Configurable Burst Characteristics
- Wrapped burst lengths:
- 16 bytes (8 clocks)
- 32 bytes (16 clocks)
- 64 bytes (32 clocks)
- Linear burst
- Hybrid option: one wrapped burst followed by a linear burst
- Wrapped or linear burst type selected in each transaction
- Configurable output drive strength
- Wrapped burst lengths:
- Low Power Modes
- Active Clock Stop During Read: 12mA, no wake-up required
- Standby: 25µA (typical), no wake-up required
- Deep Power-Down: 8µA (typical), 300µs wake-up required
- INT# output to generate an external interrupt
- Busy to ready transition
- ECC detection
- RSTO# output to generate a system-level power-on reset, user-configurable RSTO# Low period
- 512-byte Program Buffer
- Sector Erase
- Uniform 256KB sectors
- Optional eight 4KB parameter sectors (32KB total)
- Advanced sector protection, volatile and non-volatile protection methods for each sector
- Separate 1024byte one-time program array
- Operating temperature options
- Industrial (-40°C to +85°C)
- Industrial Plus (-40°C to +105°C)
- Extended (-40°C to +125°C)
- Automotive, AEC-Q100 Grade 3 (-40°C to +85°C)
- Automotive, AEC-Q100 Grade 2 (-40°C to +105°C)
- Automotive, AEC-Q100 Grade 1 (-40°C to +125°C)
- ISO/TS16949 and AEC Q100 Certified
- 100,000 program/erase cycles
- 20-year data retention
- Erase and program current
- Max peak £ 100mA
- 24-ball FBGA packaging options
- Additional features
- ECC 1-bit correction, 2-bit detection
- CRC
Applications
- Advanced driver-assistance systems (ADAS)
- Automotive instrument clusters
- Infotainment systems
- Networking devices
- Industrial automation
- Communication systems
- Medical applications
Logic Block Diagram
Related Development Tools
Infineon Technologies Scheda di valutazione T2G CYTVII-B-H-4M-176-CPU TRAVEO™
Una scheda di valutazione a 176 pin basata sulla famiglia di dispositivi T2G™ CYT4BB TRAVEO.
Infineon Technologies Scheda di valutazione CYTVII-B-H-176-SO TRAVEO™ T2G
Una scheda di valutazione con presa a 176 pin basata sulla famiglia di dispositivi™ T2G CYT4BF TRAVEO.
Pubblicato: 2016-06-23
| Aggiornato: 2024-09-17